By replacing one integrated circuit – a Read Only Memory or ROM – a jr-IDE user can gain the following benefits:
- Increase of 128 KB of additional ‘upper’ DOS memory
- Optionally replace the lower 128 KB of on-board RAM with faster static RAM
- Optionally use the entire 128 KB of on-board RAM as separate dedicated video RAM
This modification requires de-soldering at least one ROM chip from your main board, replacing it with a socket, and programming and reworking a 22v10 PLD device or a replacement ROM chip.
While developing the jr-IDE project I stumbled across a ‘feature’ IBM had added to the PC Jr’s main board. Not all bus accesses are buffered across to the side-car connector. The strobes and data are gated off on an address by address basis. I presume IBM did this so that locally responding devices like on-board memory and the cartridge slots would not get clobbered by a mis-behaving side-cars? Or maybe it was just a anal designer being thorough? Why else would they not leave all options open to possible side-car expansion, right?
When I designed the jr-IDE card, I added 1 MB of static RAM intending to back-fill Upper Memory Blocks (UMBs), that is the memory located between 640 KB and 1 MB not used by peripherals, under software control. This would allow users to load DOS device drivers high and also potentially use this memory as a RAM disk with existing drivers. What I wasn’t aware of is the 64 KB ‘D’ and ‘E’ segments – normally reserved for front-loading ROM cartridges – and the ‘F’ segment – reserved for system ROM – were all being gated off from the side-car bus. Not ideal as I did not add RAM remapping support. This essentially wastes any RAM that cannot be accessed by direct map through the side-car bus. I had already written off 32 KB in the CGA video window addresses, 16 KB in the jr-IDE Option ROM area, and 64 KB system BIOS as an acceptable level of waste. I wasn’t expecting to add the ‘D’ and ‘E’ segment’s 128 KB as added waste.
To control the dynamic gating of the buffered side-car bus (XDATA), IBM used two ROM chips designated as ZM52 and ZM56 on the main board schematic and board silkscreen. Using ROMs as logic look-up tables is nothing new. Designers have been programming logic ‘truth tables’ into ROMs since ROM were invented. In fact, this practice is essentially how programmable devices like FPGAs started out and became the concept behind the Look Up Table (LUT) in PLD design.