Name ZM31; Assembly 0001; Revision P1 1.0; PartNo U1 ATF16V8; Device g16v8; Company Retrotronics.org; Designer Alan H.; Location None; Date November 2016; /* Pages and page frames are 16 KB (A13 - A0) MUX = ZM31 Mux control MBM = Motherboard memory CPU CPU PAGE ZM56 DEFAULT ZM31 TandyMOD TandyMOD+ ----------------------- ----------- ------------- ---------------- ---------------- ---------------- A19 A18 A17 A16 A15 A14 A16 A15 A14 VDU MUX MBM A16 A15 A14 PAGE A16 A15 A14 PAGE A16 A15 A14 PAGE 00000 -> 1FFFF : 0 0 0 - - - - - - A - <1> 20000 -> 2FFFF : 0 0 1 0 - - - - - - - - 30000 -> 3FFFF : 0 0 1 1 - - - - - - - - 40000 -> 4FFFF : 0 1 0 0 - - - - - - - - 50000 -> 5FFFF : 0 1 0 1 - - - - - - - - 60000 -> 6FFFF : 0 1 1 0 - - - - - - - - 70000 -> 7FFFF : 0 1 1 1 - - - - - - - - 80000 -> 8FFFF : 1 0 0 0 - - - - - - - - 90000 -> 9FFFF : 1 0 0 1 - - - - - - - - A0000 -> AFFFF : 1 0 1 0 - - - - - - - - B0000 -> B7FFF : 1 0 1 1 0 - - - - - - - B8000 -> BBFFF : 1 0 1 1 1 0 0 0 0 A A A 0 0 0 (0) 0 0 0 (0) 0 0 0 (0) BC000 -> BFFFF : 1 0 1 1 1 1 0 0 0 A A A 0 0 0 (0) 0 0 1 (1) 0 0 1 (1) B8000 -> BBFFF : 1 0 1 1 1 0 0 0 1 A A A 0 0 1 (1) 0 0 1 (1) 0 0 1 (1) BC000 -> BFFFF : 1 0 1 1 1 1 0 0 1 A A A 0 0 1 (1) 0 0 0 (0) 0 *1 0 (2) -> Note <4> B8000 -> BBFFF : 1 0 1 1 1 0 0 1 0 A A A 0 1 0 (2) 0 1 0 (2) 0 1 0 (2) BC000 -> BFFFF : 1 0 1 1 1 1 0 1 0 A A A 0 1 0 (2) 0 1 1 (3) 0 1 1 (3) B8000 -> BBFFF : 1 0 1 1 1 0 0 1 1 A A A 0 1 1 (3) 0 1 1 (3) 0 1 1 (3) BC000 -> BFFFF : 1 0 1 1 1 1 0 1 1 A A A 0 1 1 (3) 0 1 0 (2) *1 *0 0 (4) -> Note <4> B8000 -> BBFFF : 1 0 1 1 1 0 1 0 0 A A A 1 0 0 (4) 1 0 0 (4) 1 0 0 (4) BC000 -> BFFFF : 1 0 1 1 1 1 1 0 0 A A A 1 0 0 (4) 1 0 1 (5) 1 0 1 (5) B8000 -> BBFFF : 1 0 1 1 1 0 1 0 1 A A A 1 0 1 (5) 1 0 1 (5) 1 0 1 (5) BC000 -> BFFFF : 1 0 1 1 1 1 1 0 1 A A A 1 0 1 (5) 1 0 0 (4) 1 *1 *0 (6) -> Note <4> B8000 -> BBFFF : 1 0 1 1 1 0 1 1 0 A A A 1 1 0 (6) 1 1 0 (6) 1 1 0 (6) BC000 -> BFFFF : 1 0 1 1 1 1 1 1 0 A A A 1 1 0 (6) 1 1 1 (7) 1 1 1 (7) B8000 -> BBFFF : 1 0 1 1 1 0 1 1 1 A A A 1 1 1 (7) 1 1 1 (7) 1 1 1 (7) BC000 -> BFFFF : 1 0 1 1 1 1 1 1 1 A A A 1 1 1 (7) 1 1 0 (6) *0 *0 0 (0) -> Note <4> C0000 -> CFFFF : 1 1 0 0 - - - - - - - - D0000 -> DFFFF : 1 1 0 1 - - - - - - - <2> E0000 -> EFFFF : 1 1 1 0 - - - - - - - <2> F0000 -> FFFFF : 1 1 1 1 - - - - - - - <3> <1> - Active by default. Disabling this will allow side-car fill of all lower 128KB which will result in much faster lower memory performance and no video hole. However it will break most video routines that write directly to low memory and not the CGA window including some of the PCJr's own BIOS. It will also allow the full 128KB to be used for video modes. This selection can be applied on 32KB boundaries. So it would be possible to just turn it on for lower 96 KB. <2> - Active by default. By disabling these (on 32KB boundaries), it is possible to redirect D and E segments to side-car memory where it becomes RAM. This effectively disables the cartridge slots. However it does allow for more DOS upper memory blocks with correct driver support. <3> - Active by default. It is possible to reroute BIOS selection to a side car so it can be easily reflashed. However it requires a guarantee'd stable image in the side car or needs to be switchable. <4> - In a normal Tandy mod, for odd selected page numbers, the resulting memory target for the upper frame is incorrect as there is no carry forward. This isn't a big deal as nearly all Tandy graphic situations are 32 KB based, have no awareness of more memory, and even page aligned. The enhanced mod takes care of this aliasing just in case. Not that for page 7, the upper 16KB page frame rolls over to page 0. */ Pin 9 = SEL; Pin 6 = !TANDY; Pin 7 = XA14; Pin 2 = XA15; Pin 3 = XA16; Pin 8 = PG0; Pin 5 = PG1; Pin 4 = PG2; Pin 17 = OUT14; Pin 18 = OUT15; Pin 15 = OUT16; /* * Setup an active page + XA14 adder to provide the page address (+1) * for the upper page frame (selected by XA14) */ CARRY0 = XA14; ADD14 = PG0 $ CARRY0; CARRY1 = PG0 & CARRY0; ADD15 = PG1 $ CARRY1; CARRY2 = PG1 & CARRY1; ADD16 = PG2 $ CARRY2; /* * Straight forward 3:1 mux selection logic based on the pre-existing * select input and the TandyMOD+ enable dip switch */ OUT14 = (SEL & XA14) # (!SEL & TANDY & ADD14) # (!SEL & !TANDY & PG0); OUT15 = (SEL & XA15) # (!SEL & TANDY & ADD15) # (!SEL & !TANDY & PG1); OUT16 = (SEL & XA16) # (!SEL & TANDY & ADD16) # (!SEL & !TANDY & PG2);